Digital inputs and outputs
This controller is equipped with digital inputs and outputs.
- The first bit corresponds to the special function of an output or input. These functions are always available on bits 0 to 15 (inclusive) of the respective object. These include the limit switches and the home switch for the digital inputs and the brake control for the outputs.
- The second bit shows the output/input as a level; these are then available on bits 16 to 31.
To manipulate the value of output 2, always use bit 17 in 60FEh.
To activate the "negative limit switch" special function of input 1, set bit 0 in 3240h:01h; to query the status of the input, read bit 0 in 60FDh. Bit 16 in 60FDh also shows the status of input 1 (independent of whether or not the special function of the input was activated).
This assignment is graphically illustrated in the following drawing.
The following inputs are available:
|Input||Special function||Switching threshold switchable||Differential / single-ended|
|1||Negative limit switch||yes, 5 V or 24 V (see 3240h:06h)||single-ended|
|2||Positive limit switch||yes, 5 V or 24 V (see 3240h:06h)||single-ended|
|3||Home switch||yes, 5 V or 24 V (see 3240h:06h)||single-ended|
|4||None||yes, 5 V or 24 V (see 3240h:06h)||single-ended|
|5||None||no, 5 V to 24 V wide range input||single-ended|
|6||None||no, 5 V to 24 V wide range input||single-ended|
The value of an input can be manipulated using the following OD settings, whereby only the corresponding bit acts on the input here.
3240h:01h (Special Function Enable): This bit allows special functions of an input to be switched off (value "0") or on (value "1"). If input 1 is not used as, e.g., a negative limit switch, the special function must be switched off to prevent an erroneous response to the signal generator. The object has no effect on bits 16 to 31.
The firmware evaluates the following bits:
- Bit 0: Negative limit switch
- Bit 1: Positive limit switch
- Bit 2: Home switch
If, for example, two limit switches and one home switch are used, bits 0–2 in 3240h:01h must be set to "1".
3240h:02h (Function Inverted): This bit switches from normally open logic (a logical high level at the input yields the value "1" in object 60FDh) to normally closed logic (the logical high level at the input yields the value "0"). This applies for the special functions (except for the clock and direction inputs) and for the normal inputs. If the bit has the value "0", normally open logic applies; for the value "1", normally closed logic applies.
3240h:03h (Force Enable): This bit switches on the software simulation of input values if it is set to "1". In this case, the actual values are no longer used in object 3240h:04h, but rather the set values for the respective input.
3240h:05h (Raw Value): This object contains the unmodified input value.
3240h:06h (Input Range Select): This can be used to switch inputs – that are equipped with this function – from the switching threshold of 5 V (bit is "0") to the switching threshold of 24 V (bit is "1"). Bit 0 corresponds to input 1 here, bit 1 to input 2, etc.
60FDh (Digital Inputs): This object contains a summary of the inputs and the special functions.
Computation of the inputs
Computation of the input signal using the example of input 1:
The value at bit 0 of object 60FDh is interpreted by the firmware as negative limit switch; the result of the complete computation is stored in bit 16.
To perform the assignment of the inputs more flexibly, there is a mode called Input Routing Mode. This assigns a signal of a source to a bit in object 60FDh.
This mode is activated by setting object 3240h:08h (Routing Enable) to 1.
Object 3242h determines which signal source is routed to which bit of 60FDh. Subindex 01h of 3242h determines bit 0, subindex 02h determines bit 1, and so forth. You can find the signal sources and their numbers in the following lists.
|00||00||Signal is always 0|
|01||01||Physical input 1|
|02||02||Physical input 2|
|03||03||Physical input 3|
|04||04||Physical input 4|
|05||05||Physical input 5|
|06||06||Physical input 6|
|07||07||Physical input 7|
|08||08||Physical input 8|
|09||09||Physical input 9|
|10||0A||Physical input 10|
|11||0B||Physical input 11|
|12||0C||Physical input 12|
|13||0D||Physical input 13|
|14||0E||Physical input 14|
|15||0F||Physical input 15|
|16||10||Physical input 16|
|65||41||Hall input "U"|
|66||42||Hall input "V"|
|67||43||Hall input "W"|
|68||44||Encoder input "A"|
|69||45||Encoder input "B"|
|70||46||Encoder input "Index"|
|72||48||"Ethernet active" status|
The following table describes the inverted signals of the previous table.
|128||80||Signal is always 1|
|129||81||Inverted physical input 1|
|130||82||Inverted physical input 2|
|131||83||Inverted physical input 3|
|132||84||Inverted physical input 4|
|133||85||Inverted physical input 5|
|134||86||Inverted physical input 6|
|135||87||Inverted physical input 7|
|136||88||Inverted physical input 8|
|137||89||Inverted physical input 9|
|138||8A||Inverted physical input 10|
|139||8B||Inverted physical input 11|
|140||8C||Inverted physical input 12|
|141||8D||Inverted physical input 13|
|142||8E||Inverted physical input 14|
|143||8F||Inverted physical input 15|
|144||90||Inverted physical input 16|
|193||C1||Inverted Hall input "U"|
|194||C2||Inverted Hall input "V"|
|195||C3||Inverted Hall input "W"|
|196||C4||Inverted encoder input "A"|
|197||C5||Inverted encoder input "B"|
|198||C6||Inverted encoder input "Index"|
|200||C8||"Ethernet active" inverted status|
Input 1 is to be routed to bit 16 of object 60FDh:
The number of the signal source for input 1 is "1". The routing for bit 16 is written in 3242h:11h.
Hence, object 3242h:11h must be set to the value "1".
The outputs are controlled via object 60FEh. Here, output 1 corresponds to bit 16 in object 60FEh, output 2 corresponds to bit 17, etc., as with the inputs. The outputs with special functions are again entered in the firmware in the lower bits 0 to 15. The only bit assigned at the present time is bit 0, which controls the motor brake.
The outputs are implemented as open drain. Hence, an external voltage supply is always necessary.
The digital output signal should continue to be used. For this purpose, a circuit as shown in the following figure is to be realized.
With a supply voltage of +24 V, a resistance value Rexternal of 10 kΩ is recommended.
A simple load is to be used with the digital output.
Additional OD entries are available for manipulating the value of the outputs (see the following example for further information). As with the inputs, only the bit at the corresponding location acts on the respective output:
3250h:01h: No function.
3250h:02h: This is used to switch the logic from normally open to normally closed. Configured as normally open, the input outputs a logical high level if the bit is "1". With the normally closed configuration, a logical low level is output accordingly for a "1" in object 60FEh.
3250h:05h: This object has no function and is included for reasons of compatibility.
Computation of the outputs
Example for calculating the bits of the outputs:
The "Output Routing Mode" assigns an output a signal source; a control bit in object 60FEh:01h switches the signal on or off.
The source is selected with 3252h:01 to 05 in the "high byte" (bit 15 to bit 8). The assignment of a control bit from object 60FEh:01h is performed in the "low byte" (bit 7 to bit 0) of 3252h:01h to 05 (see following figure).
The subindex of object 3252h determines which signal source is routed to which output. The output assignments are listed in the following:
|Subindex 3252h||Output Pin|
|01h||Configuration of the brake output (if available)|
|02h||Configuration of output 1|
|03h||Configuration of output 2 (if available)|
|04h||Configuration of output 3 (if available)|
|05h||Configuration of output 4 (if available)|
|Number in 3252:01 to 05|
|00XXh||Output is always "1"|
|01XXh||Output is always "0"|
|02XXh||Encoder signal (6063h) with frequency divider 1|
|03XXh||Encoder signal (6063h) with frequency divider 2|
|04XXh||Encoder signal (6063h) with frequency divider 4|
|05XXh||Encoder signal (6063h) with frequency divider 8|
|06XXh||Encoder signal (6063h) with frequency divider 16|
|07XXh||Encoder signal (6063h) with frequency divider 32|
|08XXh||Encoder signal (6063h) with frequency divider 64|
|09XXh||Position Actual Value (6064h) with frequency divider 1|
|0AXXh||Position Actual Value (6064h) with frequency divider 2|
|0BXXh||Position Actual Value (6064h) with frequency divider 4|
|0CXXh||Position Actual Value (6064h) with frequency divider 8|
|0DXXh||Position Actual Value (6064h) with frequency divider 16|
|0EXXh||Position Actual Value (6064h) with frequency divider 32|
|0FXXh||Position Actual Value (6064h) with frequency divider 64|
|10XXh||PWM signal that is configured with object 2038h:05h and 06h|
|11XXh||Inverted PWM signal that is configured with object 2038h:05h and 06h|
The output is switched on by setting bit 5 in object 60FE:01.